4001 Quad 2 input NOR Gate: Difference between revisions
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This chip contains four (QUAD) NOR gates, each with 2 inputs, which can operate individually or in combination. | [[File:4001norgate.jpg|300px|right]] | ||
This chip contains four '''(QUAD) [http://en.wikipedia.org/wiki/NOR_gate NOR gates'''], each with 2 inputs, which can operate individually or in combination. | |||
Uses: | '''Uses:''' | ||
NOR logic gate. Found on electronic resource boards - Short Time Delay 1, Flip Flop 1, Set Reset Flip Flop, Motor Speed Control | |||
'''In normal use:''' | |||
Pin 14 ''(+3 to 15v)'' is connected to the positive (+ve) supply. | |||
Pin 7 is connected to the negative ''(-ve)'' supply. | |||
All unused inputs should be connected to the positive supply. | All unused inputs should be connected to the positive supply. | ||
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Each logic gate works as shown in the truth table. | Each logic gate works as shown in the truth table. | ||
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Connecting two inputs of a gate together (eg 1 & 2) makes the gate act like a NOT gate or INVERTER. | Connecting two inputs of a gate together ''(eg 1 & 2)'' makes the gate act like a [http://en.wikipedia.org/wiki/Inverter_%28logic_gate%29 '''NOT gate'''] or [http://en.wikipedia.org/wiki/Inverter_%28logic_gate%29 '''INVERTER''']. | ||
Revision as of 23:35, 10 November 2014
This chip contains four (QUAD) NOR gates, each with 2 inputs, which can operate individually or in combination.
Uses:
NOR logic gate. Found on electronic resource boards - Short Time Delay 1, Flip Flop 1, Set Reset Flip Flop, Motor Speed Control
In normal use:
Pin 14 (+3 to 15v) is connected to the positive (+ve) supply. Pin 7 is connected to the negative (-ve) supply. All unused inputs should be connected to the positive supply.
Note: The output signal is low powered and normally needs amplification to drive output devices.
Each logic gate works as shown in the truth table.
| Input 1 (eg pin 1) | Input 2 (eg pin 2) | Output (eg pin 3) |
|---|---|---|
| 0 | 0 | 1 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 0 |
Connecting two inputs of a gate together (eg 1 & 2) makes the gate act like a NOT gate or INVERTER.